Embedded Engineer (System-C & TLM)

Job Role: Embedded Engineer (SystemC & TLM)

Experience: 1-4 Years

Location: Belagavi/ Bengaluru

Key Responsibilities

• Architect and develop C++ and SystemC based TLM 2.0 models for CPUs, peripherals, and SoC components to enable accurate virtual prototyping.
• Optimize simulation performance to ensure fast, reliable, and efficient virtual testing environments.
• Collaborate closely with hardware, firmware, and software teams to define comprehensive system specifications and ensure cohesive development.
• Integrate SystemC models with industry-standard simulators such as QEMU, Synopsys Virtualizer, and other virtual platform tools.
• Participate actively in industry workgroups to contribute to and help define technical standards relevant to Virtual Platforms.
• Mentor and upskill junior engineers, fostering knowledge sharing and supporting career growth within the team.

Required Skills and Qualifications

• 1-4 years of professional experience in embedded software and firmware development, specifically with SystemC and Transaction-Level Modeling (TLM 2.0).
• Strong programming proficiency in C/C++ with a solid understanding of object-oriented programming (OOP) concepts.
• Hands-on experience in developing embedded software/firmware for SoC architectures, including CPU pipelines, GPUs, hardware accelerators, memory subsystems, and bus protocols such as AXI, PCIe, USB.
• Demonstrated expertise in modeling peripherals like timers, DMA controllers, and I/O controllers.
• Familiarity with building and optimizing SystemC models for virtual platform simulations.
• Bachelor’s or Master’s degree in B.Tech/BE/M.Tech in Computer Science, Electronics & Communication, Embedded Systems, or a related field.
• Ability to work effectively in an on-site environment at Belagavi or Bengaluru locations.

Preferred Qualifications

• Prior experience developing Virtual Platforms (VPs) for semiconductor or embedded systems companies.
• Knowledge of simulators such as QEMU, Synopsys Virtualizer, or equivalent virtual platform tools.
• Exposure to hardware/software co-simulation methodologies and workflows.
• Basic understanding of hardware description languages like Verilog/SystemVerilog for hardware design analysis.